Issued Patents 2016
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9501600 | Standard cells for predetermined function having different types of layout | Shang-Chih Hsieh, Hui-Zhong Zhuang, Chun-Fu Chen, Hsiang-Jen Tseng | 2016-11-22 |
| 9478609 | Integrated circuit with multiple cells having different heights | Li-Chun Tien, Ming Jin Huang, Pin-Dai Sue | 2016-10-25 |
| 9443758 | Connecting techniques for stacked CMOS devices | Hsiang-Jen Tseng, Wei-Yu Chen, Li-Chun Tien | 2016-09-13 |
| 9431381 | System and method of processing cutting layout and example switching circuit | Tung-Heng Hsieh, Hui-Zhong Zhuang, Chung-Te Lin, Sheng-Hsiung Wang, Li-Chun Tien | 2016-08-30 |
| 9425141 | Integrated circuit with elongated coupling | Tung-Heng Hsieh, Hui-Zhong Zhuang, Chung-Te Lin, Sheng-Hsiung Wang, Li-Chun Tien | 2016-08-23 |
| 9412700 | Semiconductor device and method of manufacturing semiconductor device | Tung-Heng Hsieh, Hui-Zhong Zhuang, Chung-Te Lin, Sheng-Hsiung Wang, Li-Chun Tien | 2016-08-09 |
| 9336348 | Method of forming layout design | Tung-Heng Hsieh, Chung-Te Lin, Sheng-Hsiung Wang, Hui-Zhong Zhuang, Min-Hsiung Chiang +1 more | 2016-05-10 |
| 9323881 | Method and layout of an integrated circuit | Hsiang-Jen Tseng, Wei-Yu Chen, Ruei-Wun SUN, Hung-Jung Tseng, Shun Li Chen +1 more | 2016-04-26 |
| 9245887 | Method and layout of an integrated circuit | Chun-Fu Chen, Hsiang-Jen Tseng, Wei-Yu Chen, Hui-Zhong Zhuang, Shang-Chih Hsieh +1 more | 2016-01-26 |
| 9231106 | FinFET with an asymmetric source/drain structure and method of making same | Hsiang-Jen Tseng, Wei-Yu Chen, Kuo-Nan Yang, Ming-Hsiang Song, Ta-Pen Guo | 2016-01-05 |