Issued Patents 2016
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9503061 | System and method for calibrating chips in a 3D chip stack architecture | Ying-Yu Hsu, Chih-Hsien Chang | 2016-11-22 |
| 9363115 | System and method for aligning data bits | Ying-Yu Hsu, Shih-Hung Lan, Chih-Hsien Chang | 2016-06-07 |
| 9287252 | Semiconductor mismatch reduction | Chung-Hui Chen, Yung-Chow Peng, Po-Zeng Kang, Chung-Peng Hsieh | 2016-03-15 |
| 9231585 | System and method for calibrating chips in a 3D chip stack architecture | Ying-Yu Hsu, Chih-Hsien Chang | 2016-01-05 |