Issued Patents 2016
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9495506 | Methods for layout verification for polysilicon cell edge structures in FinFET standard cells using filters | Shih-Hsin Chen | 2016-11-15 |
| 9342647 | Integrated circuit design method and apparatus | Shih-Hsin Chen | 2016-05-17 |
| 9331066 | Method and computer-readable medium for detecting parasitic transistors by utilizing equivalent circuit and threshold distance | Ming-Huei Tsai, Yao-Jen Hsieh | 2016-05-03 |