Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9501280 | Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer | — | 2016-11-22 |
| 9454491 | Systems and methods for accessing a unified translation lookaside buffer | Karthikeyan Avudaiyappan | 2016-09-27 |
| 9442772 | Global and local interconnect structure comprising routing matrix to support the execution of instruction sequences by a plurality of engines | — | 2016-09-13 |
| 9436476 | Method and apparatus for sorting elements in hardware structures | Mandeep Singh | 2016-09-06 |
| 9430410 | Systems and methods for supporting a plurality of load accesses of a cache in a single cycle | Karthikeyan Avudaiyappan | 2016-08-30 |
| 9424046 | Systems and methods for load canceling in a processor that is connected to an external interconnect fabric | Karthikeyan Avudaiyappan | 2016-08-23 |
| 9348754 | Systems and methods for implementing weak stream software data and instruction prefetching using a hardware data prefetcher | Karthikeyan Avudaiyappan | 2016-05-24 |
| 9274793 | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines | — | 2016-03-01 |
| 9229873 | Systems and methods for supporting a plurality of load and store accesses of a cache | Karthikeyan Avudaiyappan | 2016-01-05 |