Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9514831 | Multi-clock generation through phase locked loop (PLL) reference | Jonathan Huynh, Sung-En Wang, Jongmin Park | 2016-12-06 |
| 9368224 | Self-adjusting regulation current for memory array source line | Sung-En Wang, Jonathan Huynh, Jongmin Park | 2016-06-14 |