Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9312866 | Phase lock loop (PLL/FLL) clock signal generation with frequency scaling to power supply voltage | Tao Liu, Jawid Aziz | 2016-04-12 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9312866 | Phase lock loop (PLL/FLL) clock signal generation with frequency scaling to power supply voltage | Tao Liu, Jawid Aziz | 2016-04-12 |