{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2016", "item": "https://www.patentleaderboard.com/2016/"}, {"@type": "ListItem", "position": 3, "name": "Inventors", "item": "https://www.patentleaderboard.com/2016/inventors"}, {"@type": "ListItem", "position": 4, "name": "Michael DeCesaris", "item": "https://www.patentleaderboard.com/2016/inventor/fl:mi_ln:decesaris-1"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Michael DeCesaris — 15 Patents in 2016

LPLenovo (Singapore) Pte.: 15 patents #5 of 330Top 2%
Carrboro, NC: #1 of 25 inventorsTop 4%
North Carolina: #41 of 5,540 inventorsTop 1%
Overall (2016): #2,712 of 481,213Top 1%
15 Patents 2016

Issued Patents 2016

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
9480042 Dynamic identifier modification of physical resources for resource discovery in a data center Luke D. Remis, John K. Whetzel 2016-10-25
9477485 Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets Brian A. Baker, Jeffrey R. Hamilton, Douglas W. Oliver 2016-10-25
9471433 Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets Brian A. Baker, Jeffrey R. Hamilton, Douglas W. Oliver 2016-10-18
9471329 Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets Brian A. Baker, Jeffrey R. Hamilton, Douglas W. Oliver 2016-10-18
9465761 Managing slave devices James J. Parsonese, Luke D. Remis, Gregory D. Sellman 2016-10-11
9454505 Chip select (‘CS’) multiplication in a serial peripheral interface (‘SPI’) system Steven C. Jacobson, Luke D. Remis, Gregory D. Sellman 2016-09-27
9411408 Load optimization using cable-associated voltage drop Gary D. Cudak, Luke D. Remis, Brian C. Totten 2016-08-09
9411770 Controlling a plurality of serial peripheral interface (‘SPI’) peripherals using a single chip select Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden 2016-08-09
9396768 Regulating voltage responsive to the shortest aggregate distance to the installed memory modules Luke D. Remis, Brian C. Totten 2016-07-19
9384787 Selecting a voltage sense line that maximizes memory margin Luke D. Remis, Brian C. Totten 2016-07-05
9367442 Allocating memory usage based on voltage regulator efficiency James J. Parsonese, Luke D. Remis, Brian C. Totten 2016-06-14
9323321 Intelligent over-current prevention James J. Parsonese, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden 2016-04-26
9261098 Fan speed and memory regulator control based on memory margin James J. Parsonese, Luke D. Remis, Philip L. Weinstein 2016-02-16
9239809 Message broadcast in a 1-wire system James J. Parsonese, Luke D. Remis, Kevin S. D. Vernon 2016-01-19
9239613 Intelligent over-current prevention James J. Parsonese, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden 2016-01-19