Issued Patents 2016
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9412440 | Systems and methods of pipelined output latching involving synchronous memory arrays | Yoshinori Sato | 2016-08-09 |
| 9384822 | Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features | Paul M-Bhor Chiang, Soon Kyu PARK, Gi-Won Cha | 2016-07-05 |
| 9385032 | Systems and methods involving data bus inversion memory circuitry, configuration and/or operation | — | 2016-07-05 |
| 9356611 | Systems and methods involving phase detection with adaptive locking/detection features | Jyn-Bang Shyu, Yoshinori Sato, Jae Hyeong Kim | 2016-05-31 |
| 9318174 | Memory systems and methods involving high speed local address circuitry | Patrick Chuang, Mu-Hsiang Huang | 2016-04-19 |