Issued Patents 2016
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9502310 | Integration method for a vertical nanowire transistor | Ming Li, Yuancheng Yang, Gong Chen, Hao Zhang, Ru Huang | 2016-11-22 |
| 9478641 | Method for fabricating FinFET with separated double gates on bulk silicon | Ru Huang, Xiaoyan Xu, Jia Li, Runsheng Wang | 2016-10-25 |
| 9425060 | Method for fabricating multiple layers of ultra narrow silicon wires | Ming Li, Yuancheng Yang, Haoran Xuan, Hao Zhang, Ru Huang | 2016-08-23 |
| 9396949 | Method of adjusting a threshold voltage of a multi-gate structure device | Ming Li, Jia Li, Xiaoyan Xu, Ru Huang | 2016-07-19 |
| 9356124 | Method for fabricating multi-gate structure device with source and drain having quasi-SOI structure | Ru Huang, Jia Li, Xiaoyan Xu, Ming Li | 2016-05-31 |
| 9349588 | Method for fabricating quasi-SOI source/drain field effect transistor device | Ru Huang, Ming Li, Yuancheng Yang, Haoran Xuan, Hanming Wu +1 more | 2016-05-24 |