Issued Patents 2016
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9500706 | Hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture support | Sagar Nataraj, Karthikeyan Natarajan, Bo Yang | 2016-11-22 |
| 9395414 | System for reducing peak power during scan shift at the local level for scan based tests | Milind Sonawane, Satya Puvvada | 2016-07-19 |
| 9377510 | System for reducing peak power during scan shift at the global level for scan based tests | Milind Sonawane, Satya Puvvada | 2016-06-28 |