| 9525586 |
QoS based binary translation and application streaming |
Bharath Muthiah, William Rash, Glenn J. Hinton, Scott Hayn, David B. Papworth |
2016-12-20 |
| 9501281 |
Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Vinodh Gopal, James D. Guilford, Erdinc Ozturk, Wajdi K. Feghali, Gilbert M. Wolrich |
2016-11-22 |
| 9495166 |
Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Vinodh Gopal, James D. Guilford, Erdinc Ozturk, Wajdi K. Feghali, Gilbert M. Wolrich |
2016-11-15 |
| 9495165 |
Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Vinodh Gopal, James D. Guilford, Erdinc Ozturk, Wajdi K. Feghali, Gilbert M. Wolrich |
2016-11-15 |
| 9436435 |
Apparatus and method for vector instructions for large integer arithmetic |
Gilbert M. Wolrich, Kirk S. Yap, James D. Guilford, Erdinc Ozturk, Vinodh Gopal +2 more |
2016-09-06 |
| 9417880 |
Instruction for performing an overload check |
Baiju V. Patel, Rajeev Gopalakrishna |
2016-08-16 |
| 9411600 |
Instructions and logic to provide memory access key protection functionality |
H. Peter Anvin |
2016-08-09 |
| 9405537 |
Apparatus and method of execution unit for calculating multiple rounds of a skein hashing algorithm |
Gilbert M. Wolrich, Kirk S. Yap, James D. Guilford, Erdinc Ozturk, Vinodh Gopal +2 more |
2016-08-02 |
| 9395990 |
Mode dependent partial width load to wider register processors, methods, and systems |
William C. Rash, Yazmin A. Santiago |
2016-07-19 |
| 9372764 |
Event counter checkpointing and restoring |
Laura A. Knauth, Ravi Rajwar, Konrad K. Lai, Peggy J. Irelan |
2016-06-21 |
| 9367314 |
Converting conditional short forward branches to computationally equivalent predicated instructions |
Edward T. Grochowski, Yazmin A. Santiago, Mishali Naik |
2016-06-14 |
| 9354681 |
Protected power management mode in a processor |
William C. Rash, Yazmin A. Santiago |
2016-05-31 |
| 9325498 |
Performing AES encryption or decryption in multiple modes with a single instruction |
Srinivas Chennupaty, Shay Gueron |
2016-04-26 |
| 9323535 |
Instruction order enforcement pairs of instructions, processors, methods, and systems |
William C. Rash, Yazmin A. Santiago |
2016-04-26 |
| 9323533 |
Supervisor mode execution protection |
Adriaan Van De Ven, Baiju V. Patel, Asit K. Mallick, Gilbert Neiger, James S. Coke +1 more |
2016-04-26 |
| 9304940 |
Processors, methods, and systems to relax synchronization of accesses to shared memory |
William C. Rash, Yazmin A. Santiago |
2016-04-05 |
| 9270460 |
Instructions to perform JH cryptographic hashing in a 256 bit data path |
Gilbert M. Wolrich, Kirk S. Yap, Vinodh Gopal, James D. Guilford, Erdinc Ozturk +2 more |
2016-02-23 |
| 9268596 |
Instruction and logic to test transactional execution status |
Ravi Rajwar, Bret L. Toll, Konrad K. Lai, Matthew C. Merten |
2016-02-23 |
| 9251374 |
Instructions to perform JH cryptographic hashing |
Kirk S. Yap, Gilbert M. Wolrich, Vinodh Gopal, James D. Guilford, Erdinc Ozturk +2 more |
2016-02-02 |
| 9235414 |
SIMD integer multiply-accumulate instruction for multi-precision arithmetic |
Vinodh Gopal, Gilbert M. Wolrich, Erdinc Ozturk, James D. Guilford, Kirk S. Yap +2 more |
2016-01-12 |