{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2016", "item": "https://www.patentleaderboard.com/2016/"}, {"@type": "ListItem", "position": 3, "name": "Intel", "item": "https://www.patentleaderboard.com/2016/company/intel"}, {"@type": "ListItem", "position": 4, "name": "Mark Rosenbluth", "item": "https://www.patentleaderboard.com/2016/inventor/fl:ma_ln:rosenbluth-1"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MR

Mark Rosenbluth — 2 Patents in 2016

Intel: 2 patents #1,153 of 5,207Top 25%
Uxbridge, MA: #6 of 17 inventorsTop 40%
Massachusetts: #2,120 of 12,163 inventorsTop 20%
Overall (2016): #117,296 of 481,213Top 25%
2 Patents 2016

Issued Patents 2016

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9442855 Transaction layer packet formatting Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more 2016-09-13 $11,798,000
9235550 Caching for heterogeneous processors Frank T. Hady, Mason Cabot, John Beck 2016-01-12 $15,498,000