Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9508414 | Memory cell supply voltage reduction prior to write cycle | — | 2016-11-29 |
| 9378788 | Negative bitline write assist circuit and method for operating the same | Pramod Kolar, Gunjan H. Pandya | 2016-06-28 |
| 9355743 | Memory array test logic | Amlan Ghosh, Keith Kasprak, John Wuu | 2016-05-31 |