Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9418016 | Method and apparatus for optimizing the usage of cache memories | Simon C. Steely, Jr., William C. Hasenplaugh | 2016-08-16 |
| 9286128 | Processor scheduling with thread performance estimation on cores of different types | Aamer Jaleel, Kenzo Van Craeynest, Paolo Narvaez | 2016-03-15 |
| 9262327 | Signature based hit-predicting cache | Simon C. Steely, Jr., William C. Hasenplaugh, Aamer Jaleel, Carole-Jean Wu | 2016-02-16 |