Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9501092 | Systems and methods for clock alignment using pipeline stages | Carl Ebeling, Audrey Kertesz | 2016-11-22 |
| 9503057 | Clock grid for integrated circuit | Ramanand Venkata, Christopher F. Lane | 2016-11-22 |
| 9479456 | Programmable logic device with integrated network-on-chip | Michael D. Hutton, Herman Schmit | 2016-10-25 |
| 9385717 | Level-sensitive two-phase single-wire latch controllers without contention | — | 2016-07-05 |
| 9250859 | Deterministic FIFO buffer | David W. Mendel | 2016-02-02 |