Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9438209 | Implementing clock receiver with low jitter and enhanced duty cycle | Andrew D. Davies, Grant P. Kesselring, James D. Strom | 2016-09-06 |
| 9264052 | Implementing dynamic phase error correction method and circuit for phase locked loop (PLL) | Grant P. Kesselring, James D. Strom | 2016-02-16 |