Issued Patents 2016
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9520876 | Power gating and clock gating in wiring levels | Nathaniel R. Chadwick, Tassbieh Hassan, Kirk D. Peterson, Christine Whiteside | 2016-12-13 | $6,265,000 |
| 9455251 | Decoupling capacitor using finFET topology | Todd A. Christensen | 2016-09-27 | $4,099,000 |
| 9405311 | Bias-temperature induced damage mitigation circuit | David M. Onsongo, David P. Paulsen, Kirk D. Peterson | 2016-08-02 | $5,615,000 |
| 9401643 | Bias-temperature induced damage mitigation circuit | David M. Onsongo, David P. Paulsen, Kirk D. Peterson | 2016-07-26 | $5,666,000 |