YH

Yung-Wei Hsieh

CT Chipbond Technology: 1 patents #2 of 14Top 15%
Overall (2016): #171,309 of 481,213Top 40%
1
Patents 2016

Issued Patents 2016

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9508676 Semiconductor package structure having hollow chamber and bottom substrate and package process thereof Cheng-Hung Shih, Shu-Chen Lin, Fu-Yen Ho, Yen-Ting Chen 2016-11-29