YR

Yevgen Ryazanov

CS Cadence Design Systems: 1 patents #48 of 202Top 25%
📍 San Jose, CA: #2,525 of 5,790 inventorsTop 45%
🗺 California: #22,912 of 57,791 inventorsTop 40%
Overall (2016): #177,911 of 481,213Top 40%
1
Patents 2016

Issued Patents 2016

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9400858 Virtual verification machine for a hardware based verification platform Tsair-Chin Lin, Jingbo Gao 2016-07-26