VR

Vasant Ramabadran

CS Cadence Design Systems: 3 patents #11 of 202Top 6%
📍 San Jose, CA: #893 of 5,790 inventorsTop 20%
🗺 California: #7,565 of 57,791 inventorsTop 15%
Overall (2016): #51,435 of 481,213Top 15%
3
Patents 2016

Issued Patents 2016

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9495492 Implementing synchronous triggers for waveform capture in an FPGA prototyping system Akash Sharma 2016-11-15
9405877 System and method of fast phase aligned local generation of clocks on multiple FPGA system Chun-Kuen Ho 2016-08-02
9294094 Method and apparatus for fast low skew phase generation for multiplexing signals on a multi-FPGA prototyping system 2016-03-22