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Chandrashekar L. Chetput

CS Cadence Design Systems: 1 patents #48 of 202Top 25%
📍 San Jose, CA: #2,525 of 5,790 inventorsTop 45%
🗺 California: #22,912 of 57,791 inventorsTop 40%
Overall (2016): #443,949 of 481,213Top 95%
1
Patents 2016

Issued Patents 2016

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9501592 Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language Abhijeet Kolpekwar, Aaron Mitchell Spratt, William S. Cranston 2016-11-22