Issued Patents 2016
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9529718 | Batching modified blocks to the same dram page | Syed Ali Jafri, Srilatha Manne, Mithuna S. Thottethodi, Gabriel H. Loh | 2016-12-27 |
| 9524164 | Specialized memory disambiguation mechanisms for different memory read access types | Lena E. Olson, Srilatha Manne | 2016-12-20 |
| 9507410 | Decoupled selective implementation of entry and exit prediction for power gating processor components | Manish Arora, Indrani Paul | 2016-11-29 |
| 9442557 | Using a linear prediction to configure an idle state of an entity in a computing device | Manish Arora, Nuwan Jayasena, Madhu Saravana Sibi Govindan, William L. Bircher, Michael Schulte +1 more | 2016-09-13 |
| 9443561 | Ring networks for intra- and inter-memory I/O including 3D-stacked memories | David A. Roberts, Mitesh R. Meswani, Indrani Paul | 2016-09-13 |
| 9378153 | Early write-back of modified data in a cache memory | Syed Ali Jafri, Srilatha Manne | 2016-06-28 |
| 9372803 | Method and system for shutting down active core based caches | Srilatha Manne, Michael Schulte, Lloyd Bircher, Madhu Saravana Sibi Govindan | 2016-06-21 |
| 9367455 | Using predictions for store-to-load forwarding | Lena E. Olson, Srilatha Manne, James M. O'Connor | 2016-06-14 |
| 9298615 | Methods and apparatus for soft-partitioning of a data cache for stack data | Lena E. Olson, Vilas Sridharan, James M. O'Connor, Mark D. Hill, Srilatha Manne | 2016-03-29 |
| 9286948 | Query operations for stacked-die memory device | Gabriel H. Loh, Nuwan Jayasena, James M. O'Connor | 2016-03-15 |
| 9251069 | Mechanisms to bound the presence of cache blocks with specific properties in caches | Gabriel H. Loh, Mauricio Breternitz, James M. O'Connor, Srilatha Manne, Nuwan Jayasena +1 more | 2016-02-02 |
| 9251081 | Management of caches | Kai K. Chang, Gabriel H. Loh, Lisa R. Hsu | 2016-02-02 |