Issued Patents 2016
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9484919 | Selection of logic paths for redundancy | Praful Jain, Pierre Maillard, Michael J. Hart | 2016-11-01 | $14,332,000 |
| 9483599 | Circuit design-specific failure in time rate for single event upsets | Praful Jain | 2016-11-01 | $14,332,000 |
| 9462674 | Circuits for and methods of providing a charge device model ground path using substrate taps in an integrated circuit device | Mohammed Fakhruddin, Kuok-Khian Lo | 2016-10-04 | $14,677,000 |
| 9406738 | Inductive structure formed using through silicon vias | Vassili Kireev | 2016-08-02 | $15,645,000 |
| 9379109 | Integrated circuit having improved radiation immunity | Michael J. Hart | 2016-06-28 | $4,436,000 |
| 9378322 | Preparing layouts for semiconductor circuits | — | 2016-06-28 | $4,436,000 |
| 9275180 | Programmable integrated circuit having different types of configuration memory | — | 2016-03-01 | $26,061,000 |
| 9236353 | Integrated circuit having improved radiation immunity | Praful Jain, Michael J. Hart | 2016-01-12 | $4,795,000 |