Issued Patents 2016
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9494649 | Adaptive digital delay line for characterization of clock uncertainties | Prashanth Vallur, Shraddha Padiyar, Amit Prakash Govil | 2016-11-15 |
| 9372499 | Low insertion delay clock doubler and integrated circuit clock distribution system using same | Sriram Sambamurthy, Alok Baluni, Aaron Joseph Grenat | 2016-06-21 |
| 9319037 | Self-adjusting clock doubler and integrated circuit clock distribution system using same | Alok Baluni, Samuel D. Naffziger, Sriram Sambamurthy | 2016-04-19 |