Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7989853 | Integration of high voltage JFET in linear bipolar CMOS process | Sameer Pendharkar, Philip L. Hower, Marie Denison | 2011-08-02 |
| 7968936 | Quasi-vertical gated NPN-PNP ESD protection device | Marie Denison | 2011-06-28 |
| 7939863 | Area efficient 3D integration of low noise JFET and MOS in linear bipolar CMOS process | Marie Denison | 2011-05-10 |