Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8060843 | Verification of 3D integrated circuits | Chih Sheng Tsai, Ying-Lin Liu, Kai-Yun Lin | 2011-11-15 |
| 7966596 | Place-and-route layout method with same footprint cells | Lee-Chung Lu, Ping Li, Chun-Hui Tai, Li-Chun Tien, Gwan Sin Chang | 2011-06-21 |
| 7913141 | Power gating in integrated circuits for leakage reduction | Lee-Chung Yu, Yung-Chin Hou | 2011-03-22 |