Issued Patents 2011
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8081514 | Partial speed and full speed programming for non-volatile memory using floating bit lines | Man Lung Mui, Binh Lee, Deepanshu Dutta | 2011-12-20 |
| 8045384 | Reduced programming pulse width for enhanced channel boosting in non-volatile storage | Jeffrey W. Lutze | 2011-10-25 |
| 8036044 | Dynamically adjustable erase and program levels for non-volatile memory | Jun Wan | 2011-10-11 |
| 7995394 | Program voltage compensation with word line bias change to suppress charge trapping in memory | Toru Ishigaki, Ken Oowada | 2011-08-09 |
| 7961511 | Hybrid programming methods and systems for non-volatile memory storage elements | Dana Lee, Changyuan Chen, Jeffrey W. Lutze | 2011-06-14 |
| 7916533 | Forecasting program disturb in memory by detecting natural threshold voltage distribution | Cynthia Hsu | 2011-03-29 |
| 7898864 | Read operation for memory with compensation for coupling based on write-erase cycles | — | 2011-03-01 |
| 7876611 | Compensating for coupling during read operations in non-volatile storage | Deepanshu Dutta, Jeffrey W. Lutze, Henry Chin, Toru Ishigaki | 2011-01-25 |