Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8039902 | Semiconductor devices having Si and SiGe epitaxial layers | Jin-Bum Kim, Hyung-ik Lee, Ki Hong Kim, Yong-koo Kyoung | 2011-10-18 |
| 8039350 | Methods of fabricating MOS transistors having recesses with elevated source/drain regions | Yong-Hoon Son, Byeong-Chan Lee, Deok-Hyung Lee, In-Soo Jung | 2011-10-18 |
| 8012828 | Recess gate transistor | Ji Young Min, Si Hyung Lee, Heedon Hwang, Sangbom Kang, Dongsoo Woo | 2011-09-06 |
| 8008154 | Methods of forming impurity containing insulating films and flash memory devices including the same | Young-Jin Noh, Bon-Young Koo, Ki-Hyun Hwang, Chul-Sung Kim, Sung-Kweon Baek +1 more | 2011-08-30 |
| 8008698 | Semiconductor memory devices having vertical channel transistors and related methods | Deok-Hyung Lee, Sun-Ghil Lee, Byeong-Chan Lee, Seung Hun Lee | 2011-08-30 |
| 7973355 | Nonvolatile memory devices with multiple layers having band gap relationships among the layers | Seung-Jae Baik, Hong Suk Kim, Ki-Hyun Hwang, Sang-Jin Hyun | 2011-07-05 |
| 7910421 | Methods of forming devices including different gate insulating layers on PMOS/NMOS regions | Sang-Jin Hyun, In-sang Jeom, Gab-Jin Nam, Sang-Bom Kang, Sug-hun Hong | 2011-03-22 |
| 7888246 | Semiconductor integrated circuit device and a method of fabricating the same | Yong-Hoon Son, Jong-Wook Lee | 2011-02-15 |
| 7871897 | Method of forming shallow trench isolation regions in devices with NMOS and PMOS regions | Dong-Woon Shin, Soo-Jin Hong, Guk-Hyon Yon, Sun-Ghil Lee | 2011-01-18 |