Issued Patents 2011
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8031503 | System for dynamically managing power consumption in a search engine | Carl Gyllenhammer, Greg Watson, Venkat R. Gaddam, Varadarajan Srinivasan, Chetan Deshpande | 2011-10-04 |
| 8031501 | Segmented content addressable memory device having pipelined compare operations | Bindiganavale S. Nataraj, Chetan Deshpande, Vinay Iyengar | 2011-10-04 |
| 8023300 | Content addressable memory device capable of parallel state information transfers | Varadarajan Srinivasan, Chetan Deshpande, Maheshwaran Srinivasan, Venkat R. Gaddam | 2011-09-20 |
| 8023301 | Content addressable memory device having state information processing circuitry | Varadarajan Srinivasan, Maheshwaran Srinivasan, Chetan Deshpande, Venkat R. Gaddam | 2011-09-20 |
| 7924589 | Row redundancy for content addressable memory having programmable interconnect structure | Varadarajan Srinivasan | 2011-04-12 |
| 7924590 | Compiling regular expressions for programmable content addressable memory devices | Alexei Starovoitov, Maheshwaran Srinivasan, Varadarajan Srinivasan, Sachin Joshi, Mark Birman | 2011-04-12 |
| 7920399 | Low power content addressable memory device having selectable cascaded array segments | Bindiganavale S. Nataraj, Vinay Iyengar, Chetan Deshpande | 2011-04-05 |
| 7920397 | Memory device having bit line leakage compensation | Bindiganavale S. Nataraj, Varadarajan Srinivasan | 2011-04-05 |
| 7920398 | Adaptive match line charging | Bindiganavale S. Nataraj, Chetan Deshpande, Vinay Iyengar | 2011-04-05 |
| 7916510 | Reformulating regular expressions into architecture-dependent bit groups | Alexei Starovoitov, Maheshwaran Srinivasan, Varadarajan Srinivasan, Sachin Joshi, Mark Birman | 2011-03-29 |
| 7907432 | Content addressable memory device for simultaneously searching multiple flows | Chetan Deshpande, Varadarajan Srinivasan | 2011-03-15 |
| 7881125 | Power reduction in a content addressable memory having programmable interconnect structure | Maheshwaran Srinivasan, Varadarajan Srinivasan, Sachin Joshi, Mark Birman | 2011-02-01 |
| 7876590 | Content addressable memory having selectively interconnected rows of counter circuits | Sachin Joshi, Mark Birman, Maheshwaran Srinivasan, Varadarajan Srinivasan | 2011-01-25 |