PH

Peter J. Hopper

NS National Semiconductor: 18 patents #1 of 224Top 1%
📍 San Jose, CA: #9 of 4,297 inventorsTop 1%
🗺 California: #142 of 41,698 inventorsTop 1%
Overall (2011): #812 of 364,097Top 1%
18
Patents 2011

Issued Patents 2011

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
8081494 Fully integrated multi-phase grid-tie inverter 2011-12-20
8056246 Ferrofluidic orientation sensor and method of forming the sensor William French, Ann Gabrys 2011-11-15
8042260 Methods of forming inductors on integrated circuits Peter Johnson, Peter Smeys, Andrei Papou 2011-10-25
8004303 Method and system for measuring film stress in a wafer film 2011-08-23
8004061 Conductive trace with reduced RF impedance resulting from the skin effect Peter Johnson, Kyuwoon Hwang, Michael Mian, Robert Drury 2011-08-23
7978519 Method of reading an NVM cell that utilizes a gated diode Yuri Mirgorodski, Roozbeh Parsa 2011-07-12
7973386 ESD protection bipolar device with internal avalanche diode Vladislav Vashchenko, Vladimir Kuznetsov 2011-07-05
7968913 CMOS compatable fabrication of power GaN transistors on a <100> silicon substrate William French 2011-06-28
7969790 Method of erasing an NVM cell that utilizes a gated diode Yuri Mirgorodski, Roozbeh Parsa 2011-06-28
7936246 On-chip inductor for high current applications Peter Smeys, Andrei Papou 2011-05-03
7935605 Lateral resurf NPN with high holding voltage for ESD applications Vladislav Vashchenko 2011-05-03
7929262 Method and structure for avoiding hot carrier degradation and soft leakage damage to ESD protection circuit Vladislav Vashchenko, Ann Concannon 2011-04-19
7911869 Fuse-type memory cells based on irreversible snapback device Vladislav Vashchenko, Yuri Mirgorodski 2011-03-22
7910950 High voltage ESD LDMOS-SCR with gate reference voltage Vladislav Vashchenko 2011-03-22
7897472 Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits Peter Johnson, Kyuwoon Hwang, Andrei Papou 2011-03-01
7880261 Isolation technique allowing both very high and low voltage circuits to be fabricated on the same chip William French, Ann Gabrys 2011-02-01
7875955 On-chip power inductor Peter Johnson, Kyuwoon Hwang, Philipp Lindorfer 2011-01-25
7872840 Erase pin protection in EEPROM using active snapback ESD device with positive feedback and shutdown Vladislay Vashchenko 2011-01-18