Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8077532 | Small unit internal verify read in a memory device | Tetsuji Manabe | 2011-12-13 |
| 7983085 | Memory array with inverted data-line pairs | — | 2011-07-19 |
| 7983091 | Divided bitline flash memory array with local sense and signal transmission | — | 2011-07-19 |
| 7965548 | Systems and devices including memory resistant to program disturb and methods of using, making, and operating the same | — | 2011-06-21 |
| 7864585 | Multi level inhibit scheme | — | 2011-01-04 |