Issued Patents 2011
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8086815 | System for controlling memory accesses to memory modules having a memory hub architecture | Terry R. Lee | 2011-12-27 |
| 8082404 | Memory arbitration system and method having an arbitration packet protocol | Ralph James | 2011-12-20 |
| 8019924 | System and method for memory hub-based expansion bus | — | 2011-09-13 |
| 8010866 | Memory system and method using stacked memory device dice, and system using the memory system | Paul A. LaBerge, James B. Johnson | 2011-08-30 |
| 7979757 | Method and apparatus for testing high capacity/high bandwidth memory devices | — | 2011-07-12 |
| 7966430 | Apparatus and method for direct memory access in a hub-based memory system | — | 2011-06-21 |
| 7966444 | Reconfigurable memory module and method | Terry R. Lee | 2011-06-21 |
| 7958412 | System and method for on-board timing margin testing of memory modules | — | 2011-06-07 |
| 7945737 | Memory hub with internal cache and/or memory access prediction | — | 2011-05-17 |
| 7913122 | System and method for on-board diagnostics of memory modules | — | 2011-03-22 |
| 7911819 | Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules | Terry R. Lee | 2011-03-22 |
| 7908452 | Method and system for controlling memory accesses to memory modules having a memory hub architecture | Terry R. Lee | 2011-03-15 |
| 7899969 | System and method for memory hub-based expansion bus | — | 2011-03-01 |
| 7895485 | System and method for testing a packetized memory device | — | 2011-02-22 |
| 7873775 | Multiple processor system and method including multiple memory hub modules | — | 2011-01-18 |