Issued Patents 2011
Showing 1–25 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8084843 | N well implants to separate blocks in a flash memory device | — | 2011-12-27 |
| 8086790 | Non-volatile memory device having assignable network identification | — | 2011-12-27 |
| 8085596 | Reducing noise in semiconductor devices | Vishal Sarin, Jung Sheng Hoei | 2011-12-27 |
| 8082382 | Memory device with user configurable density/performance | — | 2011-12-20 |
| 8077519 | Programming a memory device to increase data reliability | — | 2011-12-13 |
| 8072812 | Sensing of memory cells in NAND flash | Vishal Sarin | 2011-12-06 |
| 8068366 | Analog read and write paths in a solid state memory device | Vishal Sarin | 2011-11-29 |
| 8064266 | Memory devices and methods of writing data to memory devices utilizing analog voltage levels | — | 2011-11-22 |
| 8060798 | Refresh of non-volatile memory cells based on fatigue conditions | Vishal Sarin, Jung Sheng Hoei | 2011-11-15 |
| 8046646 | Defective memory block identification in a memory device | — | 2011-10-25 |
| 8040732 | NAND memory device column charging | — | 2011-10-18 |
| 8037381 | Error detection, documentation, and correction in a flash memory device | — | 2011-10-11 |
| 8037378 | Automatic test entry termination in a memory device | — | 2011-10-11 |
| 8027200 | Reduction of quick charge loss effect in a memory device | Vishal Sarin, William Saiki | 2011-09-27 |
| 8023332 | Cell deterioration warning apparatus and method | Vishal Sarin, Jung Sheng Hoei | 2011-09-20 |
| 8024629 | Input/output compression and pin reduction in an integrated circuit | Benjamin Louie, Scott N. Gatzemeier, Adam Johnson | 2011-09-20 |
| 8023334 | Program window adjust for memory cell signal line delay | Jung Sheng Hoei, Jonathan Pabustan, Vishal Sarin, William H. Radke | 2011-09-20 |
| 8023324 | Memory controller self-calibration for removing systemic influence | Vishal Sarin, Jung Sheng Hoei | 2011-09-20 |
| 8010767 | Synchronous flash memory with status burst output | — | 2011-08-30 |
| 8009469 | Multiple level cell memory device with single bit per cell, re-mappable memory block | — | 2011-08-30 |
| 8006166 | Programming error correction code into a solid state memory device with varying bits per cell | Vishal Sarin, Jung Sheng Hoei | 2011-08-23 |
| 8004887 | Configurable digital and analog input/output interface in a memory device | Vishal Sarin, Jung Sheng Hoei | 2011-08-23 |
| 7995412 | Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device | Vishal Sarin, Jung Sheng Hoei | 2011-08-09 |
| 7990775 | Methods of operating memory devices including different sets of logical erase blocks | — | 2011-08-02 |
| 7986553 | Programming of a solid state memory utilizing analog communication of bit patterns | — | 2011-07-26 |