Issued Patents 2011
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8055467 | Method of generating a restricted inline resistive fault pattern and a test pattern generator | Marek J. Marasch, John Gatt | 2011-11-08 |
| 7932762 | Latch and DFF design with improved soft error rate and a method of operating a DFF | Mark F. Turner | 2011-04-26 |