TT

Tou Nou Thao

LS Lattice Semiconductor: 1 patents #14 of 47Top 30%
📍 San Jose, CA: #1,637 of 4,297 inventorsTop 40%
🗺 California: #14,783 of 41,698 inventorsTop 40%
Overall (2011): #140,655 of 364,097Top 40%
1
Patents 2011

Issued Patents 2011

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
8010871 Auto recovery from volatile soft error upsets (SEUs) San-Ta Kow, Ann Wu 2011-08-30