Issued Patents 2011
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8000151 | Semiconductor memory column decoder device and method | Shigekazu Yamada | 2011-08-16 |
| 8000147 | Nonvolatile semiconductor memory device | Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai, Susumu Fujimura | 2011-08-16 |
| 7978514 | Semiconductor memory device for storing multivalued data | Noboru Shibata | 2011-07-12 |
| 7969784 | Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells | Ken Takeuchi, Noboru Shibata | 2011-06-28 |
| 7952925 | Nonvolatile semiconductor memory device having protection function for each memory block | Koichi Kawai, Khandker N. Quader | 2011-05-31 |
| 7952933 | Semiconductor memory device | Hiroshi Nakamura, Toru Tanzawa | 2011-05-31 |
| 7940562 | Non-volatile semiconductor memory device having non-selected word lines adjacent to selected word lines being charged at different timing for program disturb control | Hiroshi Nakamura | 2011-05-10 |
| 7908529 | Flash memory | Noboru Shibata, Toru Tanzawa | 2011-03-15 |
| 7894259 | Nonvolatile semiconductor memory device with first and second write sequences controlled by a command or an address | Noboru Shibata | 2011-02-22 |
| RE42120 | Multi-state EEPROM having write-verify control circuit | Gertjan Hemink | 2011-02-08 |
| 7864591 | Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell | Jian Chen | 2011-01-04 |
| 7864592 | Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells | Ken Takeuchi, Noboru Shibata | 2011-01-04 |