GW

Gilbert M. Wolrich

IN Intel: 16 patents #8 of 2,663Top 1%
📍 Framingham, MA: #1 of 163 inventorsTop 1%
🗺 Massachusetts: #14 of 9,131 inventorsTop 1%
Overall (2011): #1,173 of 364,097Top 1%
16
Patents 2011

Issued Patents 2011

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
8073892 Cryptographic system, method and multiplier Wajdi K. Feghali, William C. Hasenplaugh, Daniel Cutter, Vinodh Gopal, Gunnar Gaubatz 2011-12-06
8065678 Method and apparatus for scheduling the processing of commands for execution by cryptographic algorithm cores in a programmable network processor Jaroslaw J. Sydir, Chen-Chi Kuo, Kamal J. Koshy, Wajdi K. Feghali, Bradley A. Burres 2011-11-22
8042025 Determining a message residue Vinodh Gopal, Wajdi K. Feghali, Erdinc Ozturk, Shay Gueron 2011-10-18
8041945 Method and apparatus for performing an authentication after cipher operation in a network processor Jaroslaw J. Sydir, Kamal J. Koshy, Wajdi K. Feghali, Bradley A. Burres 2011-10-18
8020142 Hardware accelerator William C. Hasenplaugh, Wajdi K. Feghali, Daniel Cutter, Vinodh Gopal, Gunnar Gaubatz 2011-09-13
8005210 Modulus scaling for elliptic-curve cryptography Erdinc Ozturk, Vinodh Gopal, Wajdi K. Feghali 2011-08-23
7991983 Register set used in multithreaded parallel processor architecture Matthew J. Adiletta, William R. Wheeler, Debra Bernstein, Donald F. Hooper 2011-08-02
7986779 Efficient elliptic-curve cryptography based on primality of the order of the ECC-group Erdinc Ozturk, Vinodh Gopal, Wajdi K. Feghali 2011-07-26
7978846 Scale-invariant barrett reduction for elliptic-curve cyrptography Erdinc Ozturk, Vinodh Gopal, Wajdi K. Feghali 2011-07-12
7953221 Method for processing multiple operations Wajdi K. Feghali, Stephanie L. Hirnak, Makaram Raghunandan, Yogesh Bansal, Kirk S. Yap 2011-05-31
7925011 Method for simultaneous modular exponentiations Vinodh Gopal, Erdinc Ozturk, Kaan Yuksel, Gunnar Gaubatz, Wajdi K. Feghali 2011-04-12
7912886 Configurable exponent FIFO Vinodh Gopal, Wajdi K. Feghali, Daniel F. Cutter, Robert P. Ottavi 2011-03-22
7900022 Programmable processing unit with an input buffer and output buffer configured to exclusively exchange data with either a shared memory logic or a multiplier based upon a mode instruction Wajdi K. Feghali, William C. Hasenplaugh, Daniel F. Cutter, Vinodh Gopal 2011-03-01
7895239 Queue arrays in network devices Mark Rosenbluth, Debra Bernstein 2011-02-22
7886214 Determining a message residue Vinodh Gopal, Michael E. Kounavis 2011-02-08
7872598 Accelerated decompression Selcuk Baktir, Vinodh Gopal, Prashant Paliwal, Wajdi K. Feghali 2011-01-18