Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8078836 | Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits | Zeev Sperber, Robert Valentine, Doron Orenstein | 2011-12-13 |
| 7966482 | Interleaving saturated lower half of data elements from two source registers of packed data | Alexander Peleg, Yaakov Yaari, Millind Mittal, Larry M. Mennemeier | 2011-06-21 |
| 7882325 | Method and apparatus for a double width load using a single width load port | Zeev Sperber, Robert Valentine, Ehud Cohen, Doron Orenstien | 2011-02-01 |