JQ

Jieming Qi

IBM: 14 patents #111 of 9,568Top 2%
KT Kabushiki Kaisha Toshiba: 1 patents #1,082 of 2,818Top 40%
🗺 Texas: #39 of 11,512 inventorsTop 1%
Overall (2011): #1,603 of 364,097Top 1%
14
Patents 2011

Issued Patents 2011

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
8054119 System and method for on/off-chip characterization of pulse-width limiter outputs David William Boerstler, Eskinder Hailu 2011-11-08
8041537 Clock duty cycle measurement with charge pump without using reference clock calibration Eskinder Hailu, David William Boerstler, Masaaki Kaneko 2011-10-18
8037431 Structure for interleaved voltage controlled oscillator David William Boerstler, Eskinder Hailu, Mike Shen 2011-10-11
8032850 Structure for an absolute duty cycle measurement circuit David William Boerstler, Eskinder Hailu, Masaaki Kaneko, Bin Wan 2011-10-04
7994830 Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction Masaaki Kaneko, David William Boerstler, Eskinder Hailu 2011-08-09
7969250 Structure for a programmable interpolative voltage controlled oscillator with adjustable range David William Boerstler, Eskinder Hailu, Masaaki Kaneko 2011-06-28
7958469 Design structure for a phase locked loop with stabilized dynamic response David William Boerstler, Eskinder Hailu 2011-06-07
7917318 Structure for a duty cycle measurement circuit David William Boerstler, Eskinder Hailu, Masaaki Kaneko, Bin Wan 2011-03-29
7917795 Digital circuit to measure and/or correct duty cycles David William Boerstler, Eskinder Hailu, Byron L. Krauter, Kazuhiko Miki 2011-03-29
7913199 Structure for a duty cycle correction circuit David William Boerstler, Eskinder Hailu 2011-03-22
7904264 Absolute duty cycle measurement David William Boerstler, Eskinder Hailu, Masaaki Kaneko, Bin Wan 2011-03-08
7895005 Duty cycle measurement for various signals throughout an integrated circuit device David William Boerstler, Eskinder Hailu, Masaaki Kaneko, Bin Wan 2011-02-22
7877222 Structure for a phase locked loop with adjustable voltage based on temperature David William Boerstler, Nathaniel R. Chadwick, Eskinder Hailu, Kirk D. Peterson 2011-01-25
7863958 High speed clock signal duty cycle adjustment David William Boerstler, Steven M. Clements 2011-01-04