Issued Patents 2011
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8037439 | Data aligner in reconfigurable computing environment | Jean-Paul Aldebert, Claude Basso, Jean Calvignac | 2011-10-11 |
| 8006244 | Controller for multiple instruction thread processors | Gordon Taylor Davis, Marco C. Heddes, Ross Boyd Leavens | 2011-08-23 |
| 7995472 | Flexible network processor scheduler and data flow | Jean Calvignac, Chih-jen Chang, Joseph Franklin Logan, Daniel Wind | 2011-08-09 |
| 7984038 | Longest prefix match (LPM) algorithm implementation for a network processor | Brian Mitchell Bass, Jean Calvignac, Marco C. Heddes, Antonios Maragkos, Piyush C. Patel +1 more | 2011-07-19 |
| 7953951 | Systems and methods for time division multiplex multithreading | Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis, Harm Peter Hofstee +1 more | 2011-05-31 |
| 7929438 | Scheduler pipeline design for hierarchical link sharing | Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis | 2011-04-19 |
| 7921396 | Data aligner in reconfigurable computing environment | Jean-Paul Aldebert, Claude Basso, Jean Calvignac | 2011-04-05 |
| 7913034 | DRAM access command queuing | Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis | 2011-03-22 |
| 7904617 | Indicating data buffer by last bit flag | Claude Basso, Jean Calvignac, Marco C. Heddes, Joseph Franklin Logan | 2011-03-08 |
| 7903687 | Method for scheduling, writing, and reading data inside the partitioned buffer of a switch, router or packet processing device | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan +1 more | 2011-03-08 |
| 7881332 | Configurable ports for a host ethernet adapter | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan +1 more | 2011-02-01 |