Issued Patents 2011
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8060730 | Selective MISR data accumulation during exception processing | Jimmy Gumulja | 2011-11-15 |
| 8060724 | Provision of extended addressing modes in a single instruction multiple data (SIMD) data processor | — | 2011-11-15 |
| 8051226 | Circular buffer support in a single instruction multiple data (SIMD) data processor | — | 2011-11-01 |
| 8042002 | Method and apparatus for handling shared hardware and software debug resource events in a data processing system | Jimmy Gumulja, Jeffrey W. Scott | 2011-10-18 |
| 8042071 | Circuit and method for avoiding soft errors in storage devices | Troy L. Cooper | 2011-10-18 |
| 8024620 | Dynamic address-type selection control in a data processing system | — | 2011-09-20 |
| 8001591 | Distributed resource access protection | — | 2011-08-16 |
| 7992052 | Program correlation message generation for debug | Richard G. Collins, Jonathan J. Gamoneda | 2011-08-02 |
| 7987322 | Snoop request management in a data processing system | Michael J. Rochford, Quyen Pho | 2011-07-26 |
| 7984337 | Address translation trace message generation for debug | Richard G. Collins | 2011-07-19 |
| 7962718 | Methods for performing extended table lookups using SIMD vector permutation instructions that support out-of-range index values | — | 2011-06-14 |
| 7958401 | Debug trace messaging with one or more characteristic indicators | — | 2011-06-07 |
| 7958173 | Population count approximation circuit and method thereof | Kelly K. Taylor | 2011-06-07 |
| 7937573 | Metric for selective branch target buffer (BTB) allocation | Jeffrey W. Scott | 2011-05-03 |
| 7931190 | Circuit and method for correlated inputs to a population count circuit | Kelly K. Taylor | 2011-04-26 |
| 7925862 | Coprocessor forwarding load and store instructions with displacement to main processor for cache coherent execution when program counter value falls within predetermined ranges | Kevin B. Traylor | 2011-04-12 |
| 7895422 | Selective postponement of branch target buffer (BTB) allocation | Jeffrey W. Scott | 2011-02-22 |
| 7873819 | Branch target buffer addressing in a data processor | Jeffrey W. Scott | 2011-01-18 |
| 7870430 | Method and apparatus for sharing debug resources | Alistair Robertson, Ray Marshall | 2011-01-11 |
| 7870434 | Method and apparatus for masking debug resources | Alistair Robertson, Jimmy Gumulja | 2011-01-11 |
| 7870400 | System having a memory voltage controller which varies an operating voltage of a memory and method therefor | Prashant U. Kenkare | 2011-01-11 |
| 7865897 | Selective transaction request processing at an interconnect during a lockout | Benjamin C. Eckermann, Brett Murdock | 2011-01-04 |
| 7865704 | Selective instruction breakpoint generation based on a count of instruction source events | — | 2011-01-04 |