Issued Patents 2011
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8048751 | Method for producing a field effect device having self-aligned electrical connections with respect to the gate electrode | Claire Fenouillet-Beranger | 2011-11-01 |
| 8039332 | Method of manufacturing a buried-gate semiconductor device and corresponding integrated circuit | Emilie Bernard, Bernard Guillaumot, Christian Vizioz | 2011-10-18 |
| 7994008 | Transistor device with two planar gates and fabrication process | Romain Wacquez, Damien Lenoble, Robin Cerutti, Thomas Skotnicki | 2011-08-09 |
| 7977187 | Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit | Emilie Bernard, Bernard Guillaumot | 2011-07-12 |
| 7960255 | Process for forming a wire portion in an integrated electronic circuit | Benjamin Dumont, Arnaud Pouydebasque, Markus Müller | 2011-06-14 |
| 7955914 | Method of producing an asymmetric architecture semi-conductor device | Serdar Manakli, Jessy Bustos, Laurent Pain | 2011-06-07 |
| 7923315 | Manufacturing method for planar independent-gate or gate-all-around transistors | Arnaud Pouydebasque, Stephanne Denorme | 2011-04-12 |
| 7915110 | MOS transistor manufacturing | Claire Gallon, Claire Benouillet-Beranger | 2011-03-29 |
| 7910419 | SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness | Claire Fenouillet-Beranger | 2011-03-22 |
| 7902621 | Integrated circuit comprising mirrors buried at different depths | Perceval Coudrain, Michel Marty, Matthieu Bopp | 2011-03-08 |