JY

Judd Matthew Ylinen

CS Cadence Design Systems: 1 patents #62 of 259Top 25%
CS Candence Design Systems: 1 patents #1 of 2Top 50%
📍 San Francisco, CA: #350 of 2,197 inventorsTop 20%
🗺 California: #7,487 of 41,698 inventorsTop 20%
Overall (2011): #88,441 of 364,097Top 25%
2
Patents 2011

Issued Patents 2011

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8074187 Method and apparatus for inserting metal fill in an integrated circuit (“IC”) layout Kwok Ming Yue 2011-12-06
8015529 Methods and apparatus for diagonal route shielding Alexander Khainson 2011-09-06