HM

Hitesh Marwah

CS Cadence Design Systems: 2 patents #27 of 259Top 15%
📍 Noida, IN: #1 of 40 inventorsTop 3%
Overall (2011): #96,755 of 364,097Top 30%
2
Patents 2011

Issued Patents 2011

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
7971174 Congestion aware pin optimizer Mahendra Singh Khalsa, Sanjib Ghosh, Vandana Gupta, Pawan Fangaria 2011-06-28
7971178 System to merge custom and synthesized digital integrated circuit design data Arnold Ginetti 2011-06-28