Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8010923 | Latch based optimization during implementation of circuit designs for programmable logic devices | Sankaranarayanan Srinivasan, Brian D. Philofsky, Kamal Chaudhary, Anirban Rahut | 2011-08-30 |
| 8005886 | Systems and methods for generating network messages | Paul G. Jacobsen, Scott Guillaudeu, David R. Freeman | 2011-08-23 |
| 7926016 | Timing driven logic block configuration | Priya Sundararajan | 2011-04-12 |