Issued Patents 2011
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7979835 | Method of estimating resource requirements for a circuit design | Paul R. Schumacher, Ian Miller, David B. Parlour, Jorn W. Janneck | 2011-07-12 |
| 7886256 | Timing analysis of a mapped logic design using physical delays | Dinesh D. Gaitonde, Yau-Tsun S. Li | 2011-02-08 |