Issued Patents 2004
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826637 | Implementing for buffering devices in circuit layout to ensure same arriving time for clock signal from source root to output bonding pads | Yung-Chung Chang | 2004-11-30 |
| 6711627 | Method for scheduling execution sequence of read and write operations | — | 2004-03-23 |
| 6687320 | Phase lock loop (PLL) clock generator with programmable skew and frequency | Jiin Lai, Jyhfong Lin, Hsin-Chieh Lin, Wei Wang | 2004-02-03 |