Issued Patents 2004
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6788122 | Clock controlled power-down state | — | 2004-09-07 |
| 6732305 | Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitry | Michael C. Parris | 2004-05-04 |
| 6728931 | Time data compression technique for high speed integrated circuit memory devices | Michael C. Parris | 2004-04-27 |