Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6815248 | Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing | Rainer Leuschner, George Stojakovic | 2004-11-09 |
| 6794262 | MIM capacitor structures and fabrication methods in dual-damascene structures | Keith Kwong Hon Wong | 2004-09-21 |
| 6780775 | Design of lithography alignment and overlay measurement marks on CMP finished damascene surface | — | 2004-08-24 |
| 6750115 | Method for generating alignment marks for manufacturing MIM capacitors | Keith Kwong Hon Wong | 2004-06-15 |
| 6723600 | Method for making a metal-insulator-metal capacitor using plate-through mask techniques | Kwong Hon Wong | 2004-04-20 |
| 6713395 | Single RIE process for MIMcap top and bottom plates | — | 2004-03-30 |
| 6709874 | Method of manufacturing a metal cap layer for preventing damascene conductive lines from oxidation | — | 2004-03-23 |
| 6706588 | Method of fabricating an integrated circuit having embedded vertical capacitor | — | 2004-03-16 |
| 6692898 | Self-aligned conductive line for cross-point magnetic memory integrated circuits | — | 2004-02-17 |
| 6677635 | Stacked MIMCap between Cu dual damascene levels | Yi-Sheng Hsieh | 2004-01-13 |