Issued Patents 2004
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6828615 | Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devices | John Walsh | 2004-12-07 |
| 6818515 | Method for fabricating semiconductor device with loop line pattern structure | Chih-Yu Lee | 2004-11-16 |
| 6770954 | Semiconductor device with SI-GE layer-containing low resistance, tunable contact | John Walsh | 2004-08-03 |
| 6759335 | Buried strap formation method for sub-150 nm best DRAM devices | — | 2004-07-06 |
| 6737316 | Method of forming a deep trench DRAM cell | — | 2004-05-18 |
| 6703279 | Semiconductor device having contact of Si-Ge combined with cobalt silicide | — | 2004-03-09 |